Adders
Adders are combinations of logic gates that combine binary values to obtain a sum. They are classified according to their ability to accept and combine the digits. In this section we will discuss quarter adders, half adders, and full adders.
QUARTER ADDER
A quarter adder is a circuit that can add two binary digits but will not produce a carry. This circuit will produce the following results:
0 plus 0 = 0
0 plus 1 = 1
1 plus 0 = 1
1 plus 1 = 0 (no carry)
You will notice that the output produced is the same as the output for the Truth Table of an XOR. Therefore, an XOR gate can be used as a quarter adder.
The combination of gates in the figure below will also produce the desired results. When A and B are both LOW (0), the output of each AND gate is LOW (0); therefore, the output of the OR gate is LOW (0). When A is HIGH and B is LOW, then B is HIGH and AND gate 1 produces a HIGH output, resulting in a sum of 1 at gate 3. With A LOW and B HIGH, gate 2 output is HIGH, and the sum is 1. When both A and B are HIGH, neither AND gate has an output, and the output of gate 3 is LOW (0); no carry is produced.
Quarter adder.
HALF ADDER
A half adder is designed to combine two binary digits and produce a carry.
The figure below shows two ways of constructing a half adder. An AND gate is added in parallel to the quarter adder to generate the carry. The SUM column of the Truth Table represents the output of the quarter adder, and the CARRY column represents the output of the AND gate.
Half adders and Truth Table.
We have seen that the output of the quarter adder is HIGH when either input, but not both, is HIGH. It is only when both inputs are HIGH that the AND gate is activated and a carry is produced. The largest sum that can be obtained from a half adder is 10 2 (1 2 plus 1 2).
FULL ADDER
The full adder becomes necessary when a carry input must be added to the two binary digits to obtain the correct sum. A half adder has no input for carries from previous circuits.
One method of constructing a full adder is to use two half adders and an OR gate as shown in the figure below. The inputs A and B are applied to gates 1 and 2. These make up one half adder. The sum output of this half adder and the carryfrom a previous circuit become the inputs to the second half adder. The carry from each half adder is applied to gate 5 to produce the carryout for the circuit.
Full adder and Truth Table.
Now let’s add a series of numbers and see how the circuit operates.
First, let’s add 1 and 0. When either A or B is HIGH, gate 1 has an output. This output is applied to gates 3 and 4. Since the carryin is 0, only gate 3 will produce an output. The sum of 1 2 and 0 is 1 2.
Now let’s add 1 2 and 1 2. If A and B are both HIGH, the output of gate 1 is LOW. When the carryin is 0 (LOW), the output of gate 3 is LOW. Gate 2 produces an output that is applied to gate 5, which produces the carryout. The sum of 1 2 and 1 2 is 10 2, just as it was for the half adder.
When A and B are both LOW and the carryin is 1, only gate 3 has an output and produces a sum of 1 2 with no carryout.
Now, let’s add A or B and a carryin. For example, let’s assume that A is HIGH and B is LOW. With these conditions, gate 1 will have an output. This output and the carryin applied to gates 3 and 4 will produce a sum out of 0 and a carry of 1. This carry from gate 4 will cause gate 5 to produce a carryout. The sum of A and a carry (1 2 plus 1 2) is 10 2.
When A, B, and the carryin are all HIGH, a sum of 1 and a carryout are produced. First, consider A and B. When both are HIGH, the output of gate 1 is LOW, and the output of gate 2 is HIGH, giving us a carryout at gate 5. The carryin produces a 1 output at gate 3, giving us a sum of 1. The output of the full adder is 1 1 2. The sum of 1 2 plus 1 2 plus 1 2 is 1 1 2.
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